The present invention relates to a method for manufacturing semiconductor chips employed in a semiconductor device in which the semiconductor chips are stacked over a lower substrate, and a semiconductor device having the semiconductor chips.
In a conventional semiconductor device, when through electrodes are formed in stacked semiconductor chips, a plurality of bumps are formed in an insulating film formed on a circuit forming surface of a semiconductor wafer, and the surface (called front surface) on the circuit forming surface side thereof is attached or applied onto a support table such as glass using an adhesive such as an UV tape. The back surface of the semiconductor wafer is planarized by grinding or the like so as to be adjusted to a thickness of 50 μm to 200 μm. Using a resist mask in which holes are formed in regions or portions equivalent to the bumps of the front surface, electrode forming holes reaching the bumps are formed by dry etching. An insulating film is formed on the inner faces of the electrode forming holes and the back surface of the semiconductor wafer by a CVD method. A metal mask formed with holes smaller than the electrode forming holes is set onto the insulating film. With it as a mask, the insulating film on the bumps is removed by dry etching. After the removal of the metal mask, an insulating film having holes larger than the electrode forming holes is bonded onto the back surface of the semiconductor wafer. A barrier metal layer that covers over the insulating film and the inner faces of the electrode forming holes and the like is formed by the CVD method or the like. A conductive material is embedded into the electrode forming holes and the holes of the insulating film by a plating method or a metal paste method. Thereafter, the insulating film and the upper layer of the conductive material or the like are chipped off using hard cutting tools, thereby forming the corresponding through electrodes penetrating from the front surface of the semiconductor wafer to the back surface thereof, and the corresponding bumps on both sides thereof (refer to, for example, a patent document 1 (Japanese Unexamined Patent Publication No. 2005-64451 (paragraphs 0030 on seventh path—0045 on ninth page, and FIGS. 1 through 5)).
There is also known one wherein when through plugs are formed in a lower substrate, a protective layer used as a mask for forming plug forming holes is formed in the back surface of a support substrate of a thickness of 250 μm to 550 μm, which is made up of silicon and used for a semiconductor wafer of an SOI structure, and with the protective layer as a mask and an embedded insulating layer as an etching stop layer, plug forming holes are formed by etching, and further, the embedded insulating layer is etched to form dead-end external terminal holes in a silicon layer, and after an insulating film is formed on the inner faces of the plug forming holes and external terminal holes, a conductive material is embedded in the plug forming holes and external terminal holes by a molten metal suction method or a CVD method, followed by removal of the silicon layer and the insulating film provided on external terminals formed at the bottoms of the external terminal holes by etching or the like, thereby forming the corresponding through plugs penetrating from the front surface of the lower substrate to its back surface, and the corresponding external terminals (refer to, for example, a patent document 2 (Japanese Unexamined Patent Publication No. 2005-93954 (paragraphs 0026 on seventh page—0035 on eighth page, and FIG. 2)).
Thinning of semiconductor chips is proceeding in recent years. A semiconductor wafer whose thickness is set to about 30 μm to 70 μm has been used as a semiconductor wafer for manufacturing the semiconductor chips.
However, the technology of the patent document 1 referred to above involves the problems that since the front surface of the semiconductor wafer formed with the bumps is attached onto the support table using the adhesive, and the through electrodes and the bumps on the back surface side are formed in this state, the bumps on the front surface side adhere to the adhesive and are hence hard to peel off when the semiconductor wafer is peeled off from the support table, thus causing dropping off of the bumps on the front surface side and cracking of the semiconductor wafer, whereby the yields of the semiconductor wafer are degraded.
This is brought to the fore particularly where the semiconductor wafer is brought into thin-plate form to manufacture the thinned semiconductor chips.
Since the conductive material is embedded into the holes of the insulating film on the back surface of the semiconductor wafer and thereafter the insulating film and the upper layer of the conductive material or the like are chipped off using the hard cutting tools, a back surface planarizing process step becomes necessary to form the bumps on the back surface side for the through electrodes, thereby causing a problem in that the process of manufacturing the through electrodes becomes complex.